On the Computational Complexity of Geometrically Local QAC0 circuits
Abstract
The computational complexity of , which are constant-depth, polynomial-size quantum circuit families consisting of arbitrary single-qubit unitaries and -qubit generalized Toffoli gates, has gained tremendous focus recently. In this work, we initiate the study of the computational complexity of geometrically local circuits, where all the generalized Toffoli gates act on nearest neighbor qubits. We show that any circuit can be exactly simulated by a two-dimensional geometrically local circuit, i.e., a circuit, with a quadratic size blow-up. This implies that . We further show that if there existed a circuit that computes Parity with a bounded constant error, then for any , there would exist a circuit that exactly computes Parity, with a very "thin" width . We further study the computational power of circuits, i.e., one-dimensional circuits, which are the "thinnest" circuits. We prove a nearly logarithmic depth lower bound on circuits to compute the Parity function, even if allowing an unlimited number of ancilla. Furthermore, if the inputs are encoded in contiguous qubits, we prove that it requires a nearly linear depth circuit to compute the Parity function. This lower bound is almost tight. The results are proved via the combination of the restriction argument and the light-cone argument. These results may provide a new angle for studying the computational power of circuits and for resolving the long-standing open problem of whether Parity is in .
Source: arXiv:2604.07178v1 - http://arxiv.org/abs/2604.07178v1 PDF: https://arxiv.org/pdf/2604.07178v1 Original Link: http://arxiv.org/abs/2604.07178v1